WASHING MACHINE CONTROLLER

Keypad-driven FSM control program simulating a multi-phase wash cycle on a Raspberry Pi CM3 (ARM/Linux) — timer-driven state transitions, hatch-open safety interlock, and stepper-motor drum simulation.

EMBEDDED
Platform Raspberry Pi Compute Module 3 — ARM Cortex-A, embedded Linux
Toolchain GCC ARM cross-compiler (arm-linux-gnueabihf), VS Code remote debug via gdbserver
Peripherals 4×4 keypad, 20×4 LCD, 7-segment display, stepper motor, buzzer
Context Singapore Polytechnic — Embedded Computer Systems module, 2023

1.0 PROBLEM

Implement a keypad-driven finite-state machine controlling a simulated multi-phase washing cycle, with real-time hardware output and safety interlocks, in C on an embedded Linux single-board computer — cross-compiled from a development PC and debugged remotely on the target.

2.0 ARCHITECTURE

Three wash phases (rinse → wash → spin) run sequentially with material-dependent timing selected via keypad before the cycle begins. The state machine transitions on timer expiry or keypad events. A hatch-open safety interlock pauses the cycle and freezes all outputs until the hatch is closed — implemented as a re-entry guard in the control loop rather than a separate state, keeping the state graph simple.

The program runs on the Raspberry Pi Compute Module 3, the industrial variant of the Raspberry Pi, under embedded Linux. Code is written in C on a development PC, cross-compiled with the GCC ARM toolchain (arm-linux-gnueabihf-gcc), and deployed to the target over the network, with breakpoint debugging done remotely from VS Code through gdbserver.

The stepper motor simulates drum rotation; direction reverses between phases to approximate real drum behaviour. The 20×4 LCD shows the active phase; the 7-segment display provides a secondary countdown. A buzzer melody plays on completion.

Interaction sequence diagram showing keypad inputs triggering state transitions and hardware outputs across rinse, wash, and spin phases
Figure 1. Interaction sequence diagram
Use case diagram for normal wash cycle: select material, start cycle, monitor phases, receive completion signal
Figure 2. Use case — normal wash cycle

3.0 ERRATA & REVISIONS

The hatch interlock is handled as a re-entry guard rather than a dedicated FSM state — a deliberate trade-off that kept the state graph small, at the cost of the pause behaviour being less visible in the state diagram. A production controller would model it explicitly and add watchdog supervision so a stuck sensor cannot freeze the cycle indefinitely.